Design verification with e/

Main Author: Palnitkar, Samir
Format: Book
Language:English
Published: Upper Saddle River, NJ: Prentice Hall PTR, c2004
Subjects:
LEADER 00767nam a2200205 a 4500
001 1721125
005 20171111234434.0
008 040209s2004 cy da r 000 u eng d
020 |a 0131413090  |q hbk. 
040 |a CY  |b University of Cyprus  |e AACR2 
050 |a TK7885.7.P33 2004 
100 1 |a Palnitkar, Samir 
245 1 0 |a Design verification with e/  |c Samir Palnitkar 
260 |a Upper Saddle River, NJ:  |b Prentice Hall PTR,  |c c2004 
300 |a xi, 363 p. ;  |c 24 cm. 
504 |a Includes bibliographical references and index. 
650 0 |a Computer hardware description languages 
650 0 |a Integrated circuits  |x Verification 
650 0 |a Integrated circuits  |x Design and construction 
952 |a CY-NiOUC  |b 5a044d9d6c5ad14ac1ebdc85  |c 998a  |d 945l  |e TK7885.7.P33 2004  |t 1  |x m  |z Books