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20171111225913.0 |
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951211s1996 gw a b 001 0 eng d |
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|a 3540600329 (acid-free paper)
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| 050 |
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|a TK7874.75
|b .G65 1996
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| 100 |
1 |
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|a Golze, Ulrich,
|d 1948-
|
| 245 |
1 |
|
|a VLSI chip design with the hardware description language VERILOG :
|b anintroduction based on a large RISC processor design /
|c Ulrich Golze,with Peter Blinzer ... [et al.]
|
| 260 |
1 |
|
|a Berlin ;
|b Springer,
|c c1996.
|a New York :
|
| 300 |
1 |
|
|a xiv, 358 p. :
|b ill. ;
|c 24 cm. +
|e 1 computer disk (3 1/2 in.)
|
| 504 |
1 |
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|a Includes bibliographical references (p. [347]-351) and index.
|
| 650 |
1 |
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|a Integrated circuits
|x Very large scale integration
|x Design and construction
|x Data processing.
|
| 650 |
1 |
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|a Computer-aided design
|
| 650 |
1 |
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|a Verilog (Computer hardware description language)
|
| 650 |
1 |
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|a RISC microprocessors
|x Design and construction
|
| 700 |
1 |
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|a Blinzer, Peter
|x Data processing.
|
| 952 |
|
|
|a GrThPMO
|b 59afd53d6c5ad17d7e59bba4
|c 952a
|d 9528
|e TK7874.75.G65 1996
|t 14
|x m
|z Books
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