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20171112000053.0 |
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031222s1995 nyu r 000 0 eng d |
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|a 0471556653
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| 040 |
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|a ΤΕΙ-ΣΕΡΡΩΝ
|b gre
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| 050 |
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|a TK7895.G36
|b O43 1995
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| 082 |
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0 |
|2 21 ed.
|a 621.395
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| 082 |
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0 |
|2 22
|a 621.395
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| 082 |
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0 |
|2 20
|a 621.39/5
|
| 082 |
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0 |
|2 22
|a 621.395 OLD
|
| 100 |
1 |
0 |
|a Oldfield, John V.,
|d 1933-
|
| 245 |
1 |
0 |
|a Field-programmable gate arrays:
|b reconfigurable logic for rapid prototyping and implementation of digital systems/
|c John V. Oldfield, Richard C. Dorf
|
| 260 |
1 |
0 |
|a New York:
|b Wiley,
|c 1995
|
| 300 |
1 |
0 |
|a xxxii, 327 σ. :
|b εικ. ;
|c 25 εκ.
|
| 500 |
1 |
0 |
|a "A Wiley-Interscience publication."
|
| 500 |
1 |
0 |
|a Χρησιδάνειο από το Τμήμα Πληροφορικής και Επικοινωνιών
|
| 504 |
1 |
0 |
|a Περιέχει βιβλιογραφικές αναφορές και ευρετήριο
|
| 504 |
1 |
0 |
|a Includes bibliographical references and index
|
| 504 |
1 |
0 |
|a Includes bibliographical references and index
|
| 504 |
1 |
0 |
|a Includes bibliographical references and index.
|
| 650 |
1 |
7 |
|a Διατάξεις πυλών προγραμματιζόμενες στο πεδίο
|
| 650 |
1 |
7 |
|a Προγραμματιζόμενη λογική διάταξη
|
| 650 |
1 |
0 |
|a Field programmable gate arrays
|
| 650 |
1 |
0 |
|a Programmable array logic
|
| 650 |
1 |
0 |
|a Field programmable gate arrays
|
| 650 |
1 |
0 |
|a Programmable array logic
|
| 650 |
1 |
0 |
|a Field programmable gate arrays
|
| 700 |
1 |
0 |
|a Dorf, Richard C.
|
| 700 |
1 |
0 |
|a Dorf, Richard C
|
| 710 |
1 |
0 |
|a Wiley
|
| 710 |
1 |
0 |
|a John Wiley & Sons
|
| 952 |
|
|
|a CY-NiOUC
|b 5a044de36c5ad14ac1ebe44e
|c 998a
|d 945l
|e TK7895.G36O43 1995
|t 1
|x m
|z Books
|
| 952 |
|
|
|a GR-AtNTU
|b 59cc25116c5ad13446f93e1c
|c 998a
|d 945l
|e 621.395 OLD
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|
