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LEADER |
02002nam a2200373 a 4500 |
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1879176 |
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20171111234701.0 |
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070626s2007 ne a ob 001 0 eng d |
020 |
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|a 9780080475028
|q (electronic bk.)
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020 |
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|a 0080475027
|q (electronic bk.)
|z 9780123704900
|q (pbk. ;
|q alk. paper)
|q (pbk. ;
|q alk. paper)
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040 |
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|a N$T
|b eng
|e pn
|z 0123704901
|
050 |
|
4 |
|a QA76.9.A73
|b P377 2007eb
|
100 |
1 |
|
|a Hennessy, John L.
|
245 |
1 |
0 |
|a Computer architecture :
|b a quantitative approach /
|c John L. Hennessy, David A. Patterson ; with contributions by Andrea C. Arpaci-Dusseau [and others].
|
250 |
|
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|a 4th ed.
|
260 |
|
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|a Amsterdam ;
|b Elsevier/Morgan Kaufmann Publishers,
|c ©2007.
|a Boston :
|
300 |
|
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|a 1 online resource (1 volume (various pagings)) :
|b illustrations
|
504 |
|
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|a Includes bibliographical references and index.
|
505 |
0 |
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|a Fundamentals of computer design -- Instruction-level parallelism and its exploitation -- Limits on instruction-level parallelism -- Multiprocessors and thread-level parallelism -- Memory hierarchy design -- Storage systems -- Pipelining: basic and intermediate concepts -- Instruction set principles and examples -- Review of memory hierarchy.
|
650 |
|
0 |
|a Computer architecture.
|
650 |
|
6 |
|a Ordinateurs
|x Architecture.
|
650 |
|
6 |
|a Ordinateurs
|x Mémoires.
|
650 |
|
6 |
|a Parallélisme (Informatique)
|
650 |
|
6 |
|a Systèmes enfouis (Informatique)
|x Conception et construction.
|
650 |
|
6 |
|a Réseaux d'ordinateurs.
|
650 |
|
6 |
|a Hiérarchie de mémoires (Informatique)
|
650 |
|
6 |
|a Multiprocesseurs.
|
650 |
|
6 |
|a Arithmétique interne des ordinateurs.
|
650 |
|
7 |
|a COMPUTERS
|x Systems Architecture
|x General.
|
650 |
|
7 |
|a Computer architecture.
|
650 |
|
7 |
|a Arquitetura e organização de computadores.
|
700 |
1 |
|
|a Patterson, David A.
|
856 |
4 |
0 |
|a Arpaci-Dusseau, Andrea C.
|u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=193594
|
952 |
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|a CY-NiOUC
|b 5a0462676c5ad14ac1ee76b4
|c 998a
|d 945l
|e -
|t 1
|x m
|z Books
|