|
|
|
|
| LEADER |
00797nam a2200217 a 4500 |
| 001 |
1776627 |
| 005 |
20171111234524.0 |
| 008 |
030814s2003 maua sb 000 0 eng d |
| 020 |
|
|
|z 1402075944 (alk. paper)
|
| 040 |
|
|
|a CaPaEBR
|
| 050 |
1 |
4 |
|a TK7895.E42
|b S97 2003eb
|
| 245 |
0 |
0 |
|a System level design model with re-use of system IP
|c edited by Patrizia Cavalloro ... [et al.].
|
| 260 |
|
|
|a Boston :
|b Kluwer Academic Publishers,
|c c2003.
|
| 300 |
|
|
|a 211 p. :
|b ill.
|
| 504 |
|
|
|a Includes bibliographical references.
|
| 650 |
|
0 |
|a Systems on a chip
|x Design and construction.
|
| 650 |
|
0 |
|a Modularity (Engineering)
|
| 700 |
1 |
|
|a Cavalloro, Patrizia.
|
| 710 |
2 |
|
|a ebrary, Inc.
|
| 856 |
4 |
0 |
|u http://site.ebrary.com/lib/ucy/Doc?id=10078634
|
| 952 |
|
|
|a CY-NiOUC
|b 5a0456256c5ad14ac1eccfcc
|c 998a
|d 945l
|e -
|t 1
|x m
|z Books
|
