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LEADER |
00764nam a2200205 a 4500 |
001 |
1491228 |
005 |
20171111233548.0 |
008 |
140604t2003 njua b 001 0 eng |
020 |
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|a 9780132599702
|q pbk.
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040 |
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|a DLC
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050 |
0 |
0 |
|a TK7885.7
|b .P35 2003
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100 |
1 |
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|a Palnitkar, Samir.
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245 |
1 |
0 |
|a Verilog HDL :
|b a guide to digital design and synthesis /
|c Samir Palnitkar.
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250 |
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|a 2nd ed.
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260 |
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|a California :
|b Prentice Hall,
|c c2003.
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300 |
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|a xlii, 450 p. :
|b ill. ;
|c 25 cm. +
|e 1 CD-ROM (4 3/4 in.)
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500 |
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|a "A Prentice Hall title."
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504 |
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|a Includes bibliographical references (p. 439-440) and index.
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650 |
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0 |
|a Verilog (Computer hardware description language)
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952 |
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|a CY-LiCUT
|b 5a01a8126c5ad14ac1e7cf07
|c 945l
|d 998a
|e -
|t 6
|x cf
|z Computer Files
|